Transactional memory (TM) is heavily used for synchronization in the Haskell programming language, but its performance has historically been poor. We set out to improve this performance using hardware TM (HTM) on Intel processors. This task is complicated by Haskell’s
retry mechanism, which requires information to escape aborted transactions, and by the heavy use of indirection in the Haskell runtime, which means that even small transactions are likely to overflow hardware buffers. It is eased by functional semantics, which preclude irreversible operations; by the static separation of transactional state, which precludes privatization; and by the error containment of strong typing, which enables so-called lazy subscription to the lock that protects the "fallback'' code path.
We describe a three-level hybrid TM system for the Glasgow Haskell Compiler (GHC). Our system first attempts to perform an entire transaction in hardware. Failing that, it falls back to software tracking of read and write sets combined with a commit-time hardware transaction. If necessary, it employs a global lock to serialize commits (but still not the bodies of transactions). To get good performance from hardware TM while preserving Haskell semantics, we use Bloom filters for read and write set tracking. We also implemented and extended the newly proposed mutable constructor fields language feature to significantly reduce indirection. Experimental results with complex data structures show significant improvements in throughput and scalability.
Mon 18 Feb Times are displayed in time zone: Guadalajara, Mexico City, Monterrey change
|14:00 - 14:25|
|Modular Transactions: Bounding Mixed Races in Space and Time|
|14:25 - 14:50|
|Leveraging Hardware TM in Haskell|
Main ConferenceDOI Authorizer link File Attached
|14:50 - 15:15|
|Stretching the capacity of Hardware Transactional Memory in IBM POWER architectures|
Ricardo Jorge Duarte Filipe, Shady IssaINESC-ID, João BarretoINESC-ID, Paolo RomanoUniversity of Lisbon, PortugalDOI
|15:15 - 15:40|
|Processing Transactions in a Predefined Order|
Mohamed M. SaadVirginia Tech, Masoomeh Javidi KishiLehigh University, Shihao JingLehigh University, Sandeep HansIBM India Research Lab, Roberto PalmieriLehigh UniversityDOI