PPoPP 2019 (series) / WPMVP 2019 (series) / Workshop on Programming Models for SIMD/Vector Processing /
ARM Keynote - Francesco Petrogalli
Sat 16 Feb 2019 09:00 - 10:00 at Catholic University Room - WPMVP Session 1 Chair(s): Lionel Lacassagne
The Scalable Vector Extension (SVE) is an extension of the Armv8-A instruction set. SVE does not mandate a single architectural vector length. Instead, a vector’s length may be any multiple of 128 bits, up to a maximum of 2048 bits. This design enables a CPU vendor to choose an optimal hardware vector width for their target applications, and even allows operating systems to decide the vector length visible to a program. This talk will demonstrate how to create and compile SVE software applications using the VLA programming model, and give an overview of how the SVE portions of an application will run on any machine and with any OS settings independent of the register size.
Sat 16 FebDisplayed time zone: Guadalajara, Mexico City, Monterrey change
Sat 16 Feb
Displayed time zone: Guadalajara, Mexico City, Monterrey change
08:00 - 12:00 | WPMVP Session 1WPMVP at Catholic University Room Chair(s): Lionel Lacassagne Sorbonne University — LIP6 | ||
08:45 15mDay opening | Welcome to WPMVP workshop WPMVP Lionel Lacassagne Sorbonne University — LIP6 | ||
09:00 60mTalk | ARM Keynote - Francesco Petrogalli WPMVP Francesco Petrogalli ARM Ltd. | ||
10:00 30mCoffee break | Break WPMVP | ||
10:30 30mTalk | Compiling Efficiently with Arithmetic Emulation for the Custom-Width Connex Vector Processor WPMVP | ||
11:00 30mTalk | Automatic Vectorization of Stencil Codes with the GGDML Language Extensions WPMVP |