ARM Keynote - Francesco Petrogalli
The Scalable Vector Extension (SVE) is an extension of the Armv8-A instruction set. SVE does not mandate a single architectural vector length. Instead, a vector’s length may be any multiple of 128 bits, up to a maximum of 2048 bits. This design enables a CPU vendor to choose an optimal hardware vector width for their target applications, and even allows operating systems to decide the vector length visible to a program. This talk will demonstrate how to create and compile SVE software applications using the VLA programming model, and give an overview of how the SVE portions of an application will run on any machine and with any OS settings independent of the register size.
Sat 16 Feb (GMT-05:00) Guadalajara, Mexico City, Monterrey change
|08:45 - 09:00|
Lionel LacassagneSorbonne University — LIP6
|09:00 - 10:00|
Francesco PetrogalliARM Ltd.
|10:00 - 10:30|
|10:30 - 11:00|
|11:00 - 11:30|